Tiny-GPU is a minimal, open-source GPU implementation in Verilog designed for learning how GPUs work from the ground up, with working kernels, full documentation, and ASIC tapeout flows.

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2026-07-13

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Why it is worth attention

It fills a gap in open-source GPU education by providing a simple, documented design with simulation and actual silicon fabrication support via TinyTapeout, along with both open-source and commercial ASIC flows.

Who it is for

  • Hardware learners wanting to understand GPU internals
  • Verilog and ASIC design students
  • Open-source hardware enthusiasts and TinyTapeout users
  • Educators teaching computer architecture or GPU design

Use cases

  • Learning GPU architecture, instruction set, and parallel execution
  • Simulating and tracing matrix addition/multiplication kernels
  • Practicing ASIC implementation from RTL to GDS using open-source or commercial tools
  • Fabricating a functional GPU on TinyTapeout with a provided adapter

Strengths

  • Complete, well-documented design with only 15 files of Verilog
  • Working kernels (matadd, matmul) with execution traces and simulation support
  • Multiple ASIC implementation flows: open-source (LibreLane on sky130) and commercial (Cadence on OSU05)
  • TinyTapeout adapter with on-chip memory, host driver, and tapeout-ready deliverables

Considerations

  • Simplified architecture: no branch divergence, pipelining, warp scheduling, or memory coalescing
  • Requires external tools (Icarus, Cocotb, sv2v) for simulation; not plug-and-play
  • Tapeout limited to specific processes (sky130, OSU05) and TinyTapeout pin constraints

README quick start

tiny-gpu

A minimal GPU implementation in Verilog optimized for learning about how GPUs work from the ground up.

Built with [!IMPORTANT]

tiny-gpu is a minimal GPU implementation optimized for learning about how GPUs work from the ground up.

Specifically, with the trend toward general-purpose GPUs (GPGPUs) and ML-accelerators like Google's TPU, tiny-gpu focuses on highlighting the general principles of all of these architectures, rather than on the details of graphics-specific hardware.

With this motivation in mind, we can simplify GPUs by cutting out the majority of complexity involved with building a production-grade graphics card, and focus on the core elements that are critical to all of these modern hardware accelerators.

This project is primarily focused on exploring:

  1. Architecture - What does the architecture of a GPU look like? What are the most important elements?
  2. Parallelization - How is the SIMD progamming model implemented in hardware?
  3. Memory - How does a GPU work around the constraints of limited memory bandwidth?

After understanding the fundamentals laid out in this project, you can checkout the advanced functionality section to understand some of the most important optimizations made in production grade GPUs (that are more challenging to implement) which improve performance.

Architecture

GPU

tiny-gpu is built to execute a single kernel at a time.

In order to launch a kernel, we need to do the following:

  1. Load global program memory with the kernel code
  2. Load data memory with the necessary data
  3. Specify the number of threads to launch in the device control register
  4. Launch the kernel by setting the start signal to high.

The GPU itself consists of the following units:

  1. Device control register
  2. Dispatcher
  3. Variable number of compute cores
  4. Memory controllers for data memory & program memory
  5. Cache

Device Control Register

The device control register usually stores metadata specifying how kernels should be executed on the GPU.

In this case, the device control register just stores the thread_count - the total number of threads to launch for the active kernel.

Dispatcher

Once a kernel is launched, the dispatcher is the unit that actually manages the distribution of threads to different compute cores.

The dispatcher organizes threads

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