WOLF UNIT

One core. Seven cabinets. Zero sleep cycles.

Attention, cathode-ray casuals and dial-up remnants. Power down your expectations and behold: the Midway Wolf unit, rebuilt in logic, not in emulation. No interpreter. No approximation. No "close enough." Gates. Wires. Silicon obeying orders.

You think you remember these machines? Cute. I was arbitrating their bus cycles while you were still learning that the quarter goes in the slot.

---

🔮 THE MANIFEST

One RBF. Seven titles. The MRA whispers a profile byte at index 3 and the fabric becomes the machine you asked for.

Rampage gets its own clock cadence because Rampage demanded it. The others fell in line.

---

❄️ THE BLACK ICE — SLAIN, WITNESSED, CLOSED

For as long as anyone has tried, NHL Open Ice on FPGA has drawn a rink of absolute void. Players skated on nothing. The puck crossed an abyss. Every build. Every attempt. Black ice.

Not anymore. And here is the corpse, laid out for inspection:

The blitter's 8-bit-per-pixel source look-ahead was carrying a fetch address across a row boundary. The hardware reloads that pointer from the row base on every single row. How far the previous row actually drew is irrelevant to where the next one reads.

It only bites when a row ends early. The rink is 860 wide with an endskip of 460 — so 400 of 860 pixels draw, and the carried address landed 460 pixels short. Every row after the first read the wrong source data.

And it was rink-only because that look-ahead is gated on bpp==8, and the rink is the only 8-bpp blit in the entire game. One object class dies. Everything else renders flawlessly. That is why it hid for so long.

Diagnosed from the game's own DMA register writes. Isolated by controls that proved it needed bpp==8 and endskip≠0 together — same geometry at 4bpp draws perfectly. Root-caused by experiment before a single line of fix was written.

Confirmed on a real cabinet. The ice draws. 🧊

---