Pinscope 是一款原理图审查工具,通过将电路设计与厂商数据手册交叉比对,发现传统电气规则检查(ERC)无法捕捉的细微问题,并给出带页码引用的审查结果。

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开源协议

AGPL-3.0

最近更新

2026-07-17

AI 仓库情报摘要
FR-AI / ANALYSIS

为什么值得关注

它填补了现有EDA工具的空白,自动检查元件接口是否符合数据手册规范(如电压等级、引脚功能、工作条件),利用基于图的电路表示进行深入分析。

适合谁使用

  • 硬件工程师与PCB设计人员
  • 设计复杂电路板的电子爱好者
  • 进行设计评审的工程团队
  • 教授原理图最佳实践的教育工作者

典型使用场景

  • 在新电路板原型制作前检查设计是否符合数据手册
  • 元件变更后检查原理图回归问题
  • 验证IC间接口(如电压电平)是否在规格范围内
  • 将部分正式设计评审流程自动化,以捕获常见陷阱

项目优势

  • 检查实际数据手册规范,而不只是电气规则(如引脚复用功能、绝对最大值)
  • 每个发现都附带数据手册页码引用,便于工程师验证
  • 按零件编号缓存提取结果,减少重复处理
  • 本地运行,使用用户自己的API密钥,保护设计机密性

使用前须知

  • 需要手动下载或通过API获取数据手册PDF
  • 依赖外部LLM API(Anthropic)进行提取和审查,可能产生费用和延迟
  • 工具自称是审查者而非预言者,可能遗漏问题或标记故意设计选择
  • 仅支持特定网表格式(PADS-PCB .asc、EDIF 2.0.0 .edn)和BOM格式(CSV/XLSX)

README 快速开始

Pinscope

Pinscope reviews schematics the way a good senior engineer does: with the datasheets open.

Give it a netlist, a BOM, and your datasheet PDFs. It builds a graph of your design, reads each IC's datasheet, and checks the circuit around every part against what the manufacturer actually specifies — reference application, pin functions, absolute maximums, recommended operating conditions. Every finding points at the datasheet page that backs it up, so you can judge the call yourself instead of trusting a black box.

The reason it exists: ERC passes boards that don't work. Your EDA tool has no idea that the CH340E you powered from 5 V drives its TXD at 4.5 V into an MCU pin that maxes out at 3.6 V, or that the net you labeled UART5_TX lands on a pin whose alternate-function table only offers UART5_RX, or that the LDO's bypass pin you left floating costs you an order of magnitude in output noise. None of that is an electrical rule violation. All of it is in the datasheet, and nobody has time to re-read 400 pages per part on every revision.

How it works

  1. Parse the BOM (CSV/XLSX) and netlist (PADS-PCB .asc or EDIF 2.0.0 .edn — exportable from KiCad, Altium, OrCAD, Allegro, Xpedition, EasyEDA, Eagle) into a queryable bipartite graph of components and nets.
  2. Extract pin tables and specs from the PDFs. Large datasheets are trimmed to the relevant pages first, and every extraction is cached in a shared library, so a given part number is only ever processed once.
  3. Review each IC in isolation. The model gets the trimmed datasheet plus that IC's circuit neighborhood, can query the graph (find_connected_components, get_net_for_pin, get_pintable) and pull pages from a connected part's datasheet when a finding spans an interface. It files findings with severity, reasoning, and page citations.
  4. Compute the deterministic parts deterministically — BOM roll-up and a capacitor voltage-derating table come straight from the graph, no model involved.

A post-pass normalizes findings conservatively: it can merge duplicates and downgrade severity, never upgrade. If the reviewer hedged, the report hedges.

It's a reviewer, not an oracle. It misses things, and it will occasionally question a choice you made on purpose — that's what the citations are for.

Try it on the bundled design

simple_project/ is a small MSPM0

项目描述

A comprehensive datasheet-backed electrical schematic reviewer

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