🧠⚡ Awesome AI for Chip Design

A curated, community-maintained list of ML/LLM research & tools across the chip-design flow — from specification to silicon.

Artificial intelligence — large language models in particular — is reshaping how chips are designed, verified, and optimized. This list tracks research and open tools that apply ML/LLMs across the chip-design flow: specification and high-level synthesis, RTL generation, verification and debug, logic and physical synthesis, PPA optimization, analog and mixed-signal, FPGA, testing, and hardware security — plus the foundation models, benchmarks, datasets, techniques, and multi-agent frameworks that underpin them.

Inclusion does not imply endorsement; categories are best-effort and subjective — please open an issue or PR to correct them.

📊 At a glance

📅 Papers by year

xychart-beta
    title "Papers by year"
    x-axis [2023, 2024, 2025, 2026]
    y-axis "count" 0 --> 160
    bar [15, 78, 149, 87]

🥧 Listed entries by category (top 9 + others)

pie title "Listed entries"
    "RTL Generation" : 93
    "Verification" : 62
    "Multi-Agent" : 49
    "Techniques" : 42
    "Foundation" : 22
    "Analog/MS" : 22
    "Benchmarks" : 19
    "Security" : 18
    "HLS" : 18
    "Others" : 58

Contents

• 🧱 Front-end Design
  • 📋 Specification & System-Level
  • ⚙️ High-Level Synthesis
  • 🔣 RTL Generation
  • ✅ Verification & Testbench
  • 🐛 Bug Fixing & Debug
• 🏗️ Back-end Design
  • 🔀 Logic Synthesis
  • 📐 Physical Design & PPA
• 🌐 Domains
  • 📡 Analog & Mixed-Signal
  • 🧩 FPGA
  • 🔒 Hardware Security
  • ⚡ AI Accelerator & Architecture
• 🏛️ Foundations & Infrastructure
  • 🧠 Foundation Models
  • 🗂️ Benchmarks & Datasets
  • 🛠️ Techniques (RAG/RL/Prompt/FT)
  • 🤖 [Multi-Agent Systems](#