Pinscope is a schematic review tool that cross-references circuit designs against manufacturer datasheets to catch subtle issues that traditional ERC passes, providing page-cited findings.

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License

AGPL-3.0

Last updated

2026-07-17

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FR-AI / ANALYSIS

Why it is worth attention

It addresses a gap in existing EDA tools by automatically checking component interfaces against datasheet specifications (e.g., voltage levels, pin functions, operating conditions) using a graph-based representation of the design.

Who it is for

  • Hardware engineers and PCB designers
  • Electronics hobbyists designing complex boards
  • Engineering teams doing design reviews
  • Educators teaching schematic best practices

Use cases

  • Reviewing a new board design for datasheet compliance before prototyping
  • Checking a revised schematic for regressions after component changes
  • Verifying that interfaces between ICs (e.g., voltage levels) are within spec
  • Automating parts of a formal design review process to catch common pitfalls

Strengths

  • Checks real datasheet specifications, not just electrical rules (e.g., pin alternate functions, absolute maximums)
  • Provides page citations for each finding, enabling engineers to verify the reasoning
  • Caches extraction results per part number, reducing repeated processing
  • Runs locally with user’s own API key, preserving design confidentiality

Considerations

  • Requires manual download or API fetch of datasheet PDFs
  • Dependent on an external LLM API (Anthropic) for extraction and review, which may have costs and latency
  • Described as a reviewer, not an oracle – may miss issues or flag intentional design choices
  • Supports only specific netlist formats (PADS-PCB .asc, EDIF 2.0.0 .edn) and BOM formats (CSV/XLSX)

README quick start

Pinscope

Pinscope reviews schematics the way a good senior engineer does: with the datasheets open.

Give it a netlist, a BOM, and your datasheet PDFs. It builds a graph of your design, reads each IC's datasheet, and checks the circuit around every part against what the manufacturer actually specifies — reference application, pin functions, absolute maximums, recommended operating conditions. Every finding points at the datasheet page that backs it up, so you can judge the call yourself instead of trusting a black box.

The reason it exists: ERC passes boards that don't work. Your EDA tool has no idea that the CH340E you powered from 5 V drives its TXD at 4.5 V into an MCU pin that maxes out at 3.6 V, or that the net you labeled UART5_TX lands on a pin whose alternate-function table only offers UART5_RX, or that the LDO's bypass pin you left floating costs you an order of magnitude in output noise. None of that is an electrical rule violation. All of it is in the datasheet, and nobody has time to re-read 400 pages per part on every revision.

How it works

  1. Parse the BOM (CSV/XLSX) and netlist (PADS-PCB .asc or EDIF 2.0.0 .edn — exportable from KiCad, Altium, OrCAD, Allegro, Xpedition, EasyEDA, Eagle) into a queryable bipartite graph of components and nets.
  2. Extract pin tables and specs from the PDFs. Large datasheets are trimmed to the relevant pages first, and every extraction is cached in a shared library, so a given part number is only ever processed once.
  3. Review each IC in isolation. The model gets the trimmed datasheet plus that IC's circuit neighborhood, can query the graph (find_connected_components, get_net_for_pin, get_pintable) and pull pages from a connected part's datasheet when a finding spans an interface. It files findings with severity, reasoning, and page citations.
  4. Compute the deterministic parts deterministically — BOM roll-up and a capacitor voltage-derating table come straight from the graph, no model involved.

A post-pass normalizes findings conservatively: it can merge duplicates and downgrade severity, never upgrade. If the reviewer hedged, the report hedges.

It's a reviewer, not an oracle. It misses things, and it will occasionally question a choice you made on purpose — that's what the citations are for.

Try it on the bundled design

simple_project/ is a small MSPM0

Description

A comprehensive datasheet-backed electrical schematic reviewer

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